Date: 3/10/2015
Time: 2:00pm-4:00pm
Location: MaRC 201

Committee:
Prof. Rao Tummala (Advisor,MSE)
Prof. Preet Singh (MSE)
Prof. Richard Neu  (MSE)
Prof. Suresh Sitaraman (ME)
Dr. P. Markondeya Raj (MSE)

Title: Compliant copper microwire array interconnections for direct attach of large low-CTE packages to printed wiring boards

Abstract:
The proposed study addresses the thermomechanical reliability challenges for board-level interconnections between large low-CTE packages and organic printed wiring board. Low-CTE packages, such as silicon, glass and low-CTE organic materials, have outstanding dimensional stability and allow for precise alignment from layer to layer with small vias. This enables high interconnection density on the package level. However, the CTE mismatch between the package and the board, induces grand reliability challenges for traditional lead-free solder interconnections.

This study proposes compliant copper microwire arrays for reliable board-level interconnections.  The modeling, design, fabrication and validation of the microwire array interconnections will be demonstrated. The proposed study provides a highly reliable and SMT compatible interconnection solution, and enables the advanced low-CTE packages for the next-generation electronic systems.