Led by Hadi Esmaeilzadeh, an assistant professor in the School of Computer Science and the inaugural holder of the Catherine M. and James E. Allchin Early Career Professorship, the paper looks into the potential application of Field Programmable Gate Arrays (FPGAs) to accommodate the needs of machine-learning algorithms.

The team seeks to use a method called TABLA that implements FPGAs to improve the efficiency of machine-learning algorithms, which are used in many commercial and enterprise applications, such as health monitoring, social networking, e-commerce, and financial analysis.

According to information provided by Esmaeilzadeh and his fellow researchers, “[TABLA]… aims to bridge the gap between the machine learning algorithms and the FPGA accelerators” by "automatically generating the synthesizable implementation of the accelerator for FPGA realization using a set of hand-optimized templates.”

The team, which includes fellow researchers Divya Mahajan, Jongse Park, Emmanuel Amaro, Hardik Sharma, Amir Yazdanbakhsh, and Joon Kyung Kim, received their award during the 22nd annual Institute of Electrical and Electronics Engineers (IEEE)’s Symposium on High-Performance Computer Architecture in Barcelona, Spain, held March 12 – 16.

For more information, read the research paper and learn more about the IEEE and their upcoming conferences.