549371 news 1467277326 1475896920 <![CDATA[Georgia Tech Professor Rao Tummala to Present Keynote at the 2016 International Wafer-Level Packaging Conference]]> The SMTA and Chip Scale Review magazine have announced that The Georgia Institute of Technology, School of Electrical and Computer Engineering Professor, Dr. Rao Tummala, will present a keynote lecture at the 2016 International Wafer-Level Packaging Conference (IWLPC), on October 19 in San Jose, CA.

Titled "Promise and Future of Embedding and Fan-Out Technologies,” Prof. Tummala’s speech will touch upon the two types packaging strategies, wafer-level packaging (WLP) with embedded ICs with limited external I/O connections, and fan-out technology (eWLP) that eliminates these I/O limitations. He will also talk about two other alternatives such as panel level fan out with chip-first and chip-last options. This presentation will describe the promise and future of embedding and fan-out technologies in relation to package size, thickness, interconnect length, I'O pitch and production costs.

Prof. Rao Tummala is a Distinguished and Endowed Professor Chair at Georgia Tech. He is well known as an industrial technologist, technology pioneer, and educator. He is the father of LTCC and many System-on-Package Technologies.

Interconnecting Wafer-Level packaging, 3D, and manufacturing, the International Wafer-Level Packaging Conference (IWLPC) has been at the forefront of packaging technology evolution. IWLPC brings together some of the semiconductor industry's most respected authorities addressing all aspects of wafer-level, 3D, TSV, and MEMS device packaging and manufacturing.  More about the conference here

- Christa Ernst

]]> 2016-06-30T00:00:00-04:00 549361 image <![CDATA[Rao Tummala]]> 218150 image/png 1271 129 133 145 149 1271 170440 136711 170441 172177 170442 2557 12103 166855 166868 166968 168357 170443