{"596906":{"#nid":"596906","#data":{"type":"news","title":"Georgia Tech Researchers Support DARPA\u2019s New \u201cCHIPS\u201d Initiative","body":[{"value":"\u003Cp\u003EA team of Georgia Tech researchers is bringing electronic design software and communications expertise to DARPA\u0026#39;s new \u003Ca href=\u0022https:\/\/www.darpa.mil\/news-events\/2017-08-25\u0022\u003ECHIPS initiative\u003C\/a\u003E, which will enable future generations of integrated circuits to be assembled from plug-and-play modules known as \u0026ldquo;chiplets.\u0026rdquo; Reusing blocks of existing microelectronics technology could reduce the need to design complex monolithic chips from scratch for new applications.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EBy allowing components such as memory modules or signal processors to be easily fitted together like the parts of a jigsaw puzzle, the initiative could help reduce the cost of new ICs for Department of Defense (DoD) agencies and accelerate the application of new technology. While the initiative is driven by DoD needs for its ships, tanks and aircraft, innovations developed by the program could also reduce the cost of developing low-volume specialized devices in the commercial world.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u0026ldquo;The goal of this program is to make the design more modular so we can reuse existing components, making the design process much faster, easier and cheaper,\u0026rdquo; said \u003Ca href=\u0022http:\/\/limsk.ece.gatech.edu\/\u0022\u003ESung Kyu Lim\u003C\/a\u003E, a \u003Ca href=\u0022http:\/\/www.ece.gatech.edu\u0022\u003ESchool of Electrical and Computer Engineering\u003C\/a\u003E professor who heads up Georgia Tech\u0026rsquo;s part of the initiative. \u0026ldquo;We\u0026rsquo;ll be able to create new chips to meet specific needs by reusing these chiplets and putting them together in modular fashion. The modular design will allow us to pick and choose the components we need for specific applications.\u0026rdquo;\u0026nbsp;\u003C\/p\u003E\r\n\r\n\u003Cp\u003EMonolithic integrated circuits like those that go into smartphones contain billions of transistors. They cost tens to hundreds of millions of dollars and take months to design. Companies selling large volumes of consumer products can afford that design cost, but DoD agencies that need smaller numbers of specialized devices are looking for ways to reduce the design cost and time required.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EEnter DARPA\u0026rsquo;s Common Heterogeneous Integration and Intellectual Property Reuse Strategies (CHIPS) effort, which will use interposer technology \u0026ndash; a silicon and copper interface \u0026ndash; that will interconnect the chiplets. While the interposer adds a level of complexity to the design of the devices, it\u0026rsquo;s necessary to facilitate the 3-D modular assembly. The chiplets themselves could arise from existing designs, with engineers modifying memory, signal processing and other blocks from ICs already in production.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u0026ldquo;Instead of designing a whole new chip, you can borrow from what\u0026rsquo;s already been designed to put together a new chip quickly and at lower cost,\u0026rdquo; said Lim, who holds the Dan Fielder Endowed Chair. The chiplets would be assembled and then packaged together, facilitating shorter interconnect lengths that would reduce communication time and energy consumption between the components. The modular nature of the chiplets would also allow a block to be replaced by new technology without redesigning an entire IC.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EThe four-year CHIPS effort involves 11 teams, including major defense contractors, microelectronics companies, design firms \u0026ndash; and two other universities: the University of Michigan and North Carolina State University. In addition to Lim, the Georgia Tech effort will involve three other faculty members: Pippin Chair Professor \u003Ca href=\u0022https:\/\/www.ece.gatech.edu\/faculty-staff-directory\/madhavan-swaminathan\u0022\u003EMadhavan Swaminathan\u003C\/a\u003E, Professor \u003Ca href=\u0022https:\/\/www.ece.gatech.edu\/faculty-staff-directory\/saibal-mukhopadhyay\u0022\u003ESaibal Mukhopadhyay\u003C\/a\u003E and Assistant Professor \u003Ca href=\u0022https:\/\/www.ece.gatech.edu\/faculty-staff-directory\/tushar-krishna\u0022\u003ETushar Krishna\u003C\/a\u003E, all from the School of Electrical and Computer Engineering.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EAbout $3.7 million will come to Georgia Tech as part of the project\u0026rsquo;s budget. In addition to the faculty members, that will fund a research engineer and up to eight graduate students.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EThe Georgia Tech team will provide electronic design automation software needed to produce the chiplets, develop translator technology that will allow chiplets operating in different languages to communicate, and evaluate different design standards brought to the project by other teams.\u003C\/p\u003E\r\n\r\n\u003Cul\u003E\r\n\t\u003Cli\u003ECircuit design tools will be needed to create the chiplets, many of which will be adapted from existing designs. \u0026ldquo;A big part of what we\u0026rsquo;ll deliver for this project is electronic design automation (EDA) tools,\u0026rdquo; said Lim. \u0026ldquo;We want to automate the entire chiplet generation and integration process as much as possible using algorithms and software tools.\u0026rdquo;\u003C\/li\u003E\r\n\t\u003Cli\u003EModules from different companies may use different languages. To use them together in a new system, the chiplets will need translators, circuitry and software that will wrap around each chiplet. \u0026ldquo;We need to understand all the different languages, so we can help the chiplets communicate with one another,\u0026rdquo; Lim explained. \u0026ldquo;The complexity will depend on how many interface protocols are used in the system.\u0026rdquo;\u003C\/li\u003E\r\n\t\u003Cli\u003EThe project teams will have to work together using the same design standards. Lim\u0026rsquo;s team will establish tools and techniques for evaluating the different standards now used by different teams that are part of the overall effort. \u0026ldquo;We will provide a fair means of comparing the different technology options and picking the winner,\u0026rdquo; said Lim.\u003C\/li\u003E\r\n\u003C\/ul\u003E\r\n\r\n\u003Cp\u003EThough DARPA\u0026rsquo;s focus is on providing technology for DoD users, solutions developed from the initiative could also have broad benefits in the commercial microelectronics world. \u0026ldquo;Small- and medium-sized companies could will benefit a lot from this,\u0026rdquo; Lim said. \u0026ldquo;Small design houses that would like to develop their own ICs will likely be very interested.\u0026rdquo;\u003C\/p\u003E\r\n\r\n\u003Cp\u003EMeeting the program\u0026rsquo;s ambitious goals will be challenging, Lim says, with reliability, power, mechanical and thermal issues on the horizon. \u0026ldquo;The success of this program will make a significant contribution to the defense industry and the microelectronics community in general,\u0026rdquo; he said.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cem\u003EResearch described in this news release is supported by the Defense Advanced Research Projects Agency under award N00014-17-1-2950. The content of the information does not necessarily reflect the position or the policy of the Government, and no official endorsement should be inferred.\u003C\/em\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003EResearch News\u003Cbr \/\u003E\r\nGeorgia Institute of Technology\u003Cbr \/\u003E\r\n177 North Avenue\u003Cbr \/\u003E\r\nAtlanta, Georgia\u0026nbsp; 30332-0181\u0026nbsp; USA\u003C\/strong\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003EMedia Relations Assistance\u003C\/strong\u003E: John Toon (404-894-6986) (jtoon@gatech.edu) or Ben Brumfield (404-660-1408) (ben.brumfield@comm.gatech.edu).\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003EWriter\u003C\/strong\u003E: John Toon\u003C\/p\u003E\r\n","summary":null,"format":"limited_html"}],"field_subtitle":"","field_summary":[{"value":"\u003Cp\u003EA team of Georgia Tech researchers is bringing electronic design software and communications expertise to DARPA\u0026#39;s new CHIPS initiative, which will enable future generations of integrated circuits to be assembled from plug-and-play modules known as \u0026ldquo;chiplets.\u0026rdquo; Reusing blocks of existing microelectronics technology could reduce the need to design complex monolithic chips from scratch for new applications.\u003C\/p\u003E\r\n","format":"limited_html"}],"field_summary_sentence":[{"value":"Georgia Tech is contributing to the DARPA CHIPS initiative to reuse microelectronic designs."}],"uid":"27303","created_gmt":"2017-10-03 19:57:57","changed_gmt":"2017-10-03 21:01:34","author":"John Toon","boilerplate_text":"","field_publication":"","field_article_url":"","dateline":{"date":"2017-10-03T00:00:00-04:00","iso_date":"2017-10-03T00:00:00-04:00","tz":"America\/New_York"},"extras":[],"hg_media":{"596902":{"id":"596902","type":"image","title":"Plug and play chiplets could be the basis for future devices","body":null,"created":"1507059531","gmt_created":"2017-10-03 19:38:51","changed":"1507059531","gmt_changed":"2017-10-03 19:38:51","alt":"Schematic of chiplet assembly","file":{"fid":"227492","name":"Chips-DARPA-Update.jpg","image_path":"\/sites\/default\/files\/images\/Chips-DARPA-Update.jpg","image_full_path":"http:\/\/www.tlwarc.hg.gatech.edu\/\/sites\/default\/files\/images\/Chips-DARPA-Update.jpg","mime":"image\/jpeg","size":3103394,"path_740":"http:\/\/www.tlwarc.hg.gatech.edu\/sites\/default\/files\/styles\/740xx_scale\/public\/images\/Chips-DARPA-Update.jpg?itok=XPhhbn-E"}},"596912":{"id":"596912","type":"image","title":"Connecting chiplets on silicon interposer","body":null,"created":"1507064445","gmt_created":"2017-10-03 21:00:45","changed":"1507064445","gmt_changed":"2017-10-03 21:00:45","alt":"Chiplets on silicon interposer.","file":{"fid":"227496","name":"all-final.jpg","image_path":"\/sites\/default\/files\/images\/all-final.jpg","image_full_path":"http:\/\/www.tlwarc.hg.gatech.edu\/\/sites\/default\/files\/images\/all-final.jpg","mime":"image\/jpeg","size":1367343,"path_740":"http:\/\/www.tlwarc.hg.gatech.edu\/sites\/default\/files\/styles\/740xx_scale\/public\/images\/all-final.jpg?itok=xZb346Tq"}}},"media_ids":["596902","596912"],"groups":[{"id":"1188","name":"Research Horizons"}],"categories":[{"id":"135","name":"Research"},{"id":"153","name":"Computer Science\/Information Technology and Security"},{"id":"145","name":"Engineering"},{"id":"147","name":"Military Technology"}],"keywords":[{"id":"175758","name":"chiplets"},{"id":"175762","name":"chips"},{"id":"2832","name":"microelectronics"},{"id":"175763","name":"electronic design software"},{"id":"2183","name":"communications"},{"id":"63161","name":"integrated circuits"},{"id":"433","name":"IC"}],"core_research_areas":[{"id":"39451","name":"Electronics and Nanotechnology"},{"id":"39461","name":"Manufacturing, Trade, and Logistics"},{"id":"39481","name":"National Security"}],"news_room_topics":[{"id":"71881","name":"Science and Technology"}],"event_categories":[],"invited_audience":[],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[{"value":"\u003Cp\u003EJohn Toon\u003C\/p\u003E\r\n\r\n\u003Cp\u003EResearch News\u003C\/p\u003E\r\n\r\n\u003Cp\u003E(404) 894-6986\u003C\/p\u003E\r\n","format":"limited_html"}],"email":["jtoon@gatech.edu"],"slides":[],"orientation":[],"userdata":""}}}