{"605825":{"#nid":"605825","#data":{"type":"news","title":"CRNCH Hosts Neuromorphic Workshop","body":[{"value":"\u003Cp\u003ETwo dozen people had a unique opportunity to experiment with Georgia Tech\u0026ndash;developed hardware that can be used for neuromorphic algorithms on April 27. The training session was part of the \u003Ca href=\u0022http:\/\/crnch.gatech.edu\/\u0022\u003ECenter for Research into Novel Computing Hierarchies\u0026rsquo;\u003C\/a\u003E (CRNCH) first \u003Ca href=\u0022http:\/\/www.crnch.gatech.edu\/neuro-workshop18\u0022\u003ENeuromorphic Workshop\u003C\/a\u003E.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EThe all-day event featured overview talks and hands-on sessions with this novel hardware, known as field-programmable analog arrays (FPAA). It was led by School of Electrical and Computer Engineering and CRNCH Professor \u003Ca href=\u0022https:\/\/www.ece.gatech.edu\/faculty-staff-directory\/jennifer-olson-hasler\u0022\u003E\u003Cstrong\u003EJennifer Hasler\u003C\/strong\u003E\u003C\/a\u003E. Several local and industry participants also presented short talks on their research into neuromorphic computing and current challenges in the area.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EAn FPAA is a configurable chip that uses analog and digital logic to implement algorithms, drastically reducing the power and size of the chip. For certain applications like neuromorphic computing, analog requires fewer transistors to do the same amount of work as digital and produces fewer errors. While analog computing is traditionally a challenging field for computer scientists, hardware like the FPAA and associated high-level and open-source toolsets developed by Hasler\u0026rsquo;s group allow researchers to create new analog-based algorithms.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u0026ldquo;A single programmable and configurable analog chip can compute a large number of things,\u0026rdquo; Hasler said.\u003C\/p\u003E\r\n\r\n\u003Ch3\u003E\u003Cstrong\u003EProviding new avenues for computing performance\u003C\/strong\u003E\u003C\/h3\u003E\r\n\r\n\u003Cp\u003ENeuromorphic computers replicate the brain in structure, meaning they are highly parallel, run at lower power, and the fundamental unit computation is very small. The low-power nature of FPAAs makes them ideal for neuromorphic computing. Analog and digital hardware like the FPAA could be pivotal to providing new avenues for computing performance in the post-Moore\u0026rsquo;s law era, in which the number of transistors on an integrated circuit are no longer expected to double roughly every two years as they have for the past half-century.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u0026ldquo;Interesting, novel hardware may be able to solve this post-Moore problem,\u0026rdquo; said \u003Ca href=\u0022https:\/\/www.scs.gatech.edu\/people\/10818\/jeffrey-youngs\u0022\u003E\u003Cstrong\u003EJeff Young\u003C\/strong\u003E\u003C\/a\u003E, a research scientist in the School of Computer Science and organizer of the workshop.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EThe workshop gathered Tech students as well as researchers from prominent national labs such as Sandia, Oak Ridge, Lawrence Livermore, and Pacific Northwest National Laboratory. The speakers\u0026rsquo; short research talks expanded on how neuromorphic computing will evolve to tackle post-Moore challenges, including:\u003C\/p\u003E\r\n\r\n\u003Cul\u003E\r\n\t\u003Cli\u003E\u003Ca href=\u0022https:\/\/www.ornl.gov\/staff-profile\/catherine-d-schuman\u0022\u003E\u003Cstrong\u003ECatherine Schumann\u003C\/strong\u003E\u003C\/a\u003E\u003Cstrong\u003E,\u003C\/strong\u003E Oak Ridge National Laboratory, \u003Cem\u003EEvolutionary optimization (EO) training for neuromorphic systems\u003C\/em\u003E\u003Cbr \/\u003E\r\n\t\u0026nbsp;\u003C\/li\u003E\r\n\t\u003Cli\u003E\u003Ca href=\u0022http:\/\/neuroscience.sandia.gov\/people\/Rothganger.html\u0022\u003E\u003Cstrong\u003EFred Rothganger\u003C\/strong\u003E\u003C\/a\u003E\u003Cstrong\u003E,\u003C\/strong\u003E Sandia National Laboratories, \u003Cem\u003EN2A: A computational tool for modeling from neurons to algorithms\u003C\/em\u003E\u003Cbr \/\u003E\r\n\t\u0026nbsp;\u003C\/li\u003E\r\n\t\u003Cli\u003E\u003Ca href=\u0022https:\/\/www.cc.gatech.edu\/fac\/Constantinos.Dovrolis\/\u0022\u003E\u003Cstrong\u003EConstantine Dovrolis\u003C\/strong\u003E\u003C\/a\u003E\u003Cstrong\u003E,\u003C\/strong\u003E SCS professor, \u003Cem\u003EFrom the Spatio-Temporal Organization of the Brain to Adaptive and Safe Lifelong Learning Machines\u003C\/em\u003E\u003Cbr \/\u003E\r\n\t\u0026nbsp;\u003C\/li\u003E\r\n\t\u003Cli\u003E\u003Ca href=\u0022https:\/\/www.pnnl.gov\/science\/staff\/staff_info.asp?staff_num=7437\u0022\u003E\u003Cstrong\u003EAntonino Tumeo\u003C\/strong\u003E\u003C\/a\u003E, Pacific Northwest National Laboratory, \u003Cem\u003EExploring the intersection of graph analytics and machine learning\u003C\/em\u003E\u003C\/li\u003E\r\n\u003C\/ul\u003E\r\n\r\n\u003Cp\u003EAs a follow-up to the workshop, the FPAA will be added to the \u003Ca href=\u0022http:\/\/www.crnch.gatech.edu\/rogues-hardware\u0022\u003ERogues Gallery\u003C\/a\u003E, CRNCH\u0026rsquo;s collection of obscure and unique hardware. CRNCH provides researchers from around the world access to these machines as part of its strategic goal of rethinking high performance computing. When the gallery \u003Ca href=\u0022https:\/\/www.scs.gatech.edu\/news\/595889\/crnchs-rogues-gallery-wants-bring-weirdest-hardware-campus\u0022\u003Elaunched\u003C\/a\u003E in fall 2017, it had one specialized type of hardware, the Emu Chick, but has since grown to include field-programmable gate arrays (FPGAs), 3D stacked memory devices, and now the FPAA.\u003C\/p\u003E\r\n","summary":null,"format":"limited_html"}],"field_subtitle":"","field_summary":"","field_summary_sentence":[{"value":"CRNCH hosted a workshop to experiment with FPAAs."}],"uid":"34541","created_gmt":"2018-05-03 19:23:51","changed_gmt":"2018-06-22 19:02:32","author":"Tess Malone","boilerplate_text":"","field_publication":"","field_article_url":"","dateline":{"date":"2018-05-03T00:00:00-04:00","iso_date":"2018-05-03T00:00:00-04:00","tz":"America\/New_York"},"extras":[],"hg_media":{"605826":{"id":"605826","type":"image","title":"Neuromorphic Workshop","body":null,"created":"1525375841","gmt_created":"2018-05-03 19:30:41","changed":"1525375841","gmt_changed":"2018-05-03 19:30:41","alt":"workshop","file":{"fid":"231035","name":"IMG_4563.jpg","image_path":"\/sites\/default\/files\/images\/IMG_4563.jpg","image_full_path":"http:\/\/www.tlwarc.hg.gatech.edu\/\/sites\/default\/files\/images\/IMG_4563.jpg","mime":"image\/jpeg","size":1506144,"path_740":"http:\/\/www.tlwarc.hg.gatech.edu\/sites\/default\/files\/styles\/740xx_scale\/public\/images\/IMG_4563.jpg?itok=anVuDDBL"}}},"media_ids":["605826"],"groups":[{"id":"47223","name":"College of Computing"},{"id":"576491","name":"CRNCH"},{"id":"545781","name":"Institute for Data Engineering and Science"}],"categories":[],"keywords":[],"core_research_areas":[],"news_room_topics":[],"event_categories":[],"invited_audience":[],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[{"value":"\u003Cp\u003ETess Malone, Communications Officer\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Ca href=\u0022mailto:tess.malone@cc.gatech.edu\u0022\u003Etess.malone@cc.gatech.edu\u003C\/a\u003E\u003C\/p\u003E\r\n","format":"limited_html"}],"email":["tess.malone@cc.gatech.edu"],"slides":[],"orientation":[],"userdata":""}}}