{"62458":{"#nid":"62458","#data":{"type":"event","title":"MSE MS Defense - Kanika Sethi","body":[{"value":"\u003Cp\u003EThesis Title: High-density capacitor array fabrication on\nsilicon substrates\u003C\/p\u003E\n\n\n\n\u003Cp\u003EAbstract:\u003C\/p\u003E\n\n\n\n\u003Cp\u003ESystem integration and miniaturization demands are\ndriving integrated thin film capacitor technologies with ultra-high capacitance\ndensities for power supply integrity and efficient power management. The\nemerging need for voltage conversion and noise-free power supply in\u0026nbsp; bioelectronics and portable consumer products\nrequire ultra high-density capacitance of above 100 \u03bcF\/cm2 with BDV 16-32 V\n,independent capacitor array terminals and non-polar dielectrics. The aim of\nthis research,therefore, is to explore a new silicon- compatible thin film\nnanoelectrode capacitor technology that can meet all these demands. The\nnanoelectrode capacitor paradigm has two unique advances. The first advance is\nto achieve ultra-high surface area thin film electrodes by sintering metallic\nparticles directly on a silicon substrate at CMOS- compatible temperatures. The\nsecond advance of this study is to conformally- deposit medium permittivity\ndielectrics over such particulate nanoelectrodes using Atomic Layer Deposition\n(ALD) process.\u003C\/p\u003E\n\n\u003Cp\u003E\u0026nbsp;\u003C\/p\u003E\n\n\u003Cp\u003EThin film copper particle nanoelectrode with open-porous\nstructure was achieved by choosing a suitable phosphate-ester dispersant,\nsolvent and a sacrificial polymer for partial sintering of copper particles to\nprovide a continuous high surface area electrode. Capacitors with conformal ALD\nalumina as the dielectric and Polyethylene dioxythiophene (PEDT) as the top\nelectrode showed 30X enhancement in capacitance density for a 20-30 micron\ncopper particulate bottom electrode and 150X enhancement of capacitance density\nfor a 75 micron electrode. These samples were tested for their mechanical and\nelectrical properties by using characterization techniques such as SEM, EDS,\nI-V and C-V plots.\u0026nbsp; A capacitance density\nof 30\u0026nbsp; \u03bcF\/cm2 was demonstrated using this\napproach with BDVs of above 30 V.\u003C\/p\u003E\n\n\u003Cp\u003EThe technology is extensible to much higher capacitance\ndensities with better porosity control, reduction in particle size and higher\npermittivity dielectrics.\u003C\/p\u003E","summary":null,"format":"limited_html"}],"field_subtitle":"","field_summary":[{"value":"\u003Cp\u003EMSE M.S. Defense - Kanika Sethi\u003C\/p\u003E\n\n\n\n\u003Cp\u003ETime: 1:15 PM, Tuesday 9th November --Location: MaRC 351\u003C\/p\u003E\u003Cp\u003EThesis Title: High-density capacitor array fabrication on\nsilicon substrates\u003C\/p\u003E","format":"limited_html"}],"field_summary_sentence":[{"value":"MSE MS Defense - Kanika Sethi"}],"uid":"27388","created_gmt":"2010-11-01 14:32:20","changed_gmt":"2016-10-08 01:53:20","author":"Bill Miller","boilerplate_text":"","field_publication":"","field_article_url":"","field_event_time":{"event_time_start":"2010-11-09T00:15:00-05:00","event_time_end":"2010-11-09T02:15:00-05:00","event_time_end_last":"2010-11-09T02:15:00-05:00","gmt_time_start":"2010-11-09 05:15:00","gmt_time_end":"2010-11-09 07:15:00","gmt_time_end_last":"2010-11-09 07:15:00","rrule":null,"timezone":"America\/New_York"},"extras":[],"groups":[{"id":"1238","name":"School of Materials Science and Engineering"}],"categories":[],"keywords":[{"id":"10802","name":"MSE_Interal_Event"}],"core_research_areas":[],"news_room_topics":[],"event_categories":[],"invited_audience":[],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[],"email":[],"slides":[],"orientation":[],"userdata":""}}}