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  <title><![CDATA[CSE Faculty Candidate Talk - Amir Gholaminejad]]></title>
  <body><![CDATA[<p>To join the meeting on a computer or mobile phone:&nbsp;<a href="https://bluejeans.com/505935226" title="https://bluejeans.com/505935226">https://bluejeans.com/505935226</a></p>

<p>Phone Dial-in</p>

<p>+1.888.748.9073 (United States(Primary))</p>

<p>+1.844.540.8065 (United States(Primary))</p>

<p>+1.408.419.1715 (United States(San Jose))</p>

<p>+1.408.915.6290 (United States(San Jose))</p>

<p>(Global Numbers)</p>

<p>Meeting ID: 505 935 226</p>

<p>Room System</p>

<p>199.48.152.152 or bjn.vc</p>

<p>Meeting ID: 505 935 226</p>

<p>Want to test your video connection?</p>

<p><a href="https://bluejeans.com/111">https://bluejeans.com/111</a></p>

<p><strong>Talk Title: &nbsp;</strong><em>An Integrated Approach for Efficient Neural Network Design, Training, and Inference</em></p>

<p><strong>Talk Abstract:&nbsp;</strong>One of the main challenges in designing, training, and implementing Neural&nbsp;Networks is their high demand for computational and memory resources. Designing a model for a new task requires searching through an exponentially large space to find the right architecture, which requires multiple training runs on a large dataset.&nbsp; This has a prohibitive computational cost, as training each candidate architecture often requires millions of iterations.<br />
Even after the right architecture with good accuracy is found, implementing&nbsp;it on a target hardware platform to meet latency and&nbsp;power constraints is not straightforward.<br />
<br />
I will present a framework that efficiently utilizes reduced-precision computing to address the above challenges by considering the full stack of designing, training, and implementing the model on a target platform.&nbsp; This is achieved through careful analysis of the numerical instabilities associated with reduced-precision matrix operations, incorporation of a novel second-order, mixed-precision quantization approach, and a framework for hardware aware neural network design.</p>

<p><strong>Bio:&nbsp;</strong>Amir Gholami is a postdoctoral research fellow in BAIR Lab at UC&nbsp;Berkeley. &nbsp;He received his PhD in Computational Science and Engineering Mathematics from UT Austin, working with Prof. George Biros on bio-physics based image analysis, a research topic which received UT Austin&rsquo;s best doctoral dissertation award in 2018. Amir has extensive experience in High Performance Computing, second-order optimization methods, image registration, and large scale inverse problems, developing codes that have been scaled up to 200K cores. He is a Melosh Medal finalist, recipient of best student paper award in SC&#39;17, Gold Medal in the ACM Student Research Competition in 2015, as well as best student paper finalist in SC&rsquo;14.</p>

<p>&nbsp;</p>
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