{"646716":{"#nid":"646716","#data":{"type":"news","title":"New Cache Attack is Fastest in Decade","body":[{"value":"\u003Cp\u003EA new way of attacking a computer\u0026rsquo;s data storage cache is the fastest of its kind and may lead to stronger cybersecurity defenses. Known as Streamline, the new cache attach technique was developed by GT researchers and is more than three times faster than all other covert channel attacks and is the first attack to go faster than 1MB\/s after more than a decade of research in this area.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EThis is the second cache attack paper for School of Computer Science Professor \u003Ca href=\u0022https:\/\/www.cc.gatech.edu\/~moin\/\u0022\u003E\u003Cstrong\u003EMoin Qureshi\u0026rsquo;s\u003C\/strong\u003E\u003C\/a\u003E group, who have been working on secure cache architectures for the past three years.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u0026ldquo;It helps to think like an attacker,\u0026rdquo; said School of Electrical and Computer Engineering Ph.D. student \u003Ca href=\u0022https:\/\/sites.google.com\/site\/gururajshome\/home\u0022\u003E\u003Cstrong\u003EGururaj Saileshwar\u003C\/strong\u003E\u0026nbsp;\u003C\/a\u003E, the lead author of the paper. \u0026ldquo;It is important to improve our understanding of attacks before a real attacker in the wild does so. In the process, we came up with the Streamline attack that is faster than all existing attacks and has fewer requirements.\u0026rdquo;\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u0026ldquo;Better attacks motivate better defenses,\u0026rdquo; Qureshi said. \u0026ldquo;Advancing the attack enables us to come up with good defenses for making cache memories secure.\u0026rdquo;\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003EHow Covert Channel Attacks Work\u003C\/strong\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003EIn this type of attack, attackers use a covert channel to communicate and transmit data without detection. Memory caches are susceptible because they are often shared between processors. Such channels have become more popular recently after they were used to transmit data in speculative execution attacks like Spectre and Meltdown.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EMemory cache covert channel attacks take advantage of the time difference between access to processor caches and DRAM memory. Senders can influence whether a shared address is in the cache and manipulate the receiver\u0026rsquo;s access to it. The two fastest attacks have been the Flush+Reload and the Flush+Flush.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EIn a Flush+Reload, a sender installs an address in a cache and a receiver uses cache flush instructions to evict a shared address. In a Flush+Flush, a sender installs an address in the cache then the receiver measures the latency of the flush to access this address.\u003C\/p\u003E\r\n\r\n\u003Cp\u003EA major disadvantage of this type of attack is that it requires access to cache flush instructions, which are disabled in many new CPUs. Also, bit-by-bit synchronization between the sender and receiver that considerably slows the attack. This has limited the bit rate of current attacks to 500-600 KB\/s for more than a decade.\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Cstrong\u003EHow Streamline Works\u003C\/strong\u003E\u003C\/p\u003E\r\n\r\n\u003Cp\u003EInstead Streamline relies on asynchronous communication and makes the following improvements:\u003C\/p\u003E\r\n\r\n\u003Col\u003E\r\n\t\u003Cli\u003EStreamline communicates over a sequence of shared addresses that enables the sender to keep transmitting successive bits without waiting for the receiver.\u003C\/li\u003E\r\n\t\u003Cli\u003EThe addresses are preserved until the receiver can access them.\u003C\/li\u003E\r\n\t\u003Cli\u003EWhen the receiver accesses the address, they get evicted from the cache automatically due to cache-thrashing, the act of accessing a large sequence of addressees by the sender and receiver, without relying on flushing.\u003C\/li\u003E\r\n\u003C\/ol\u003E\r\n\r\n\u003Cp\u003EThe researchers tested Streamline on an Intel Skylake central processing unit and achieved a bit-rate of 1801 kilobytes\/second, which is 3.1 times faster than the previous fastest attack. Given that Streamline relies on generic cache properties, it works on all architectures.\u003C\/p\u003E\r\n\r\n\u003Cp\u003ESaileshwar and Qureshi wrote the paper, \u003Ca href=\u0022https:\/\/www.google.com\/url?sa=t\u0026amp;rct=j\u0026amp;q=\u0026amp;esrc=s\u0026amp;source=web\u0026amp;cd=\u0026amp;cad=rja\u0026amp;uact=8\u0026amp;ved=2ahUKEwi6m__78OzvAhU6RDABHQ9tCSoQFjAAegQIBBAD\u0026amp;url=https%3A%2F%2Fmemlab.ece.gatech.edu%2Fpapers%2FASPLOS_2021_1.pdf\u0026amp;usg=AOvVaw2PDjK7N4Xt1iws9gN6DBUw\u0022\u003E\u003Cem\u003EStreamline: A Fast, Flushless Cache Covert-Channel Attack by Enabling Asynchronous Collusion\u003C\/em\u003E\u003C\/a\u003E, with University of Illinois\u0026mdash;Urbana Champaign Assistant Professor Christopher Fletcher. The researchers will present at the premiere systems conference \u003Ca href=\u0022https:\/\/asplos-conference.org\/\u0022\u003EArchitectural Support for Programming Languages and Operating Systems (\u200bASPLOS)\u003C\/a\u003E from April 12-23.\u003C\/p\u003E\r\n","summary":null,"format":"limited_html"}],"field_subtitle":"","field_summary":"","field_summary_sentence":[{"value":"The new cache attach technique was developed by GT researchers and is more than three times faster than all other covert channel attacks and is the first attack to go faster than 1MB\/s after more than a decade of research in this area."}],"uid":"34541","created_gmt":"2021-04-21 16:39:52","changed_gmt":"2021-04-21 18:32:52","author":"Tess Malone","boilerplate_text":"","field_publication":"","field_article_url":"","dateline":{"date":"2021-04-21T00:00:00-04:00","iso_date":"2021-04-21T00:00:00-04:00","tz":"America\/New_York"},"extras":[],"hg_media":{"646721":{"id":"646721","type":"image","title":"Streamline","body":null,"created":"1619026939","gmt_created":"2021-04-21 17:42:19","changed":"1619026939","gmt_changed":"2021-04-21 17:42:19","alt":"Streamline","file":{"fid":"245485","name":"streamline.png","image_path":"\/sites\/default\/files\/images\/streamline.png","image_full_path":"http:\/\/www.tlwarc.hg.gatech.edu\/\/sites\/default\/files\/images\/streamline.png","mime":"image\/png","size":76319,"path_740":"http:\/\/www.tlwarc.hg.gatech.edu\/sites\/default\/files\/styles\/740xx_scale\/public\/images\/streamline.png?itok=TCGUWyLr"}}},"media_ids":["646721"],"groups":[{"id":"47223","name":"College of Computing"},{"id":"50875","name":"School of Computer Science"}],"categories":[],"keywords":[],"core_research_areas":[],"news_room_topics":[],"event_categories":[],"invited_audience":[],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[{"value":"\u003Cp\u003ETess Malone, Communications Officer\u003C\/p\u003E\r\n\r\n\u003Cp\u003E\u003Ca href=\u0022mailto:tess.malone@cc.gatech.edu\u0022\u003Etess.malone@cc.gatech.edu\u003C\/a\u003E\u003C\/p\u003E\r\n","format":"limited_html"}],"email":[],"slides":[],"orientation":[],"userdata":""}}}