{"70182":{"#nid":"70182","#data":{"type":"news","title":"Controlling Silicon Evaporation Improves Quality of Graphene","body":[{"value":"\u003Cp\u003EScientists from the Georgia Institute of Technology have for the first time provided details of their \u0022confinement controlled sublimation\u0022 technique for growing high-quality layers of epitaxial graphene on silicon carbide wafers.  The technique relies on controlling the vapor pressure of gas-phase silicon in the high-temperature furnace used for fabricating the material.\u003C\/p\u003E\n\u003Cp\u003EThe basic principle for growing thin layers of graphene on silicon carbide requires heating the material to about 1,500 degrees Celsius under high vacuum.  The heat drives off the silicon, leaving behind one or more layers of graphene.  But uncontrolled evaporation of silicon can produce poor quality material useless to designers of electronic devices.\n\u003C\/p\u003E\n\u003Cp\u003E\u0022For growing high-quality graphene on silicon carbide, controlling the evaporation of silicon at just the right temperature is essential,\u0022 said Walt de Heer, a professor who pioneered the technique in the Georgia Tech School of Physics.  \u0022By precisely controlling the rate at which silicon comes off the wafer, we can control the rate at which graphene is produced.  That allows us to produce very nice layers of epitaxial graphene.\u0022\n\u003C\/p\u003E\n\u003Cp\u003EDe Heer and his team begin by placing a silicon carbide wafer into an enclosure made of graphite.  A small hole in the container controls the escape of silicon atoms as the one-square-centimeter wafer is heated, maintaining the rate of silicon evaporation and condensation near its thermal equilibrium.  The growth of epitaxial graphene can be done in a vacuum or in the presence of an inert gas such as argon, and can be used to produce both single layers and multiple layers of the material.  \n\u003C\/p\u003E\n\u003Cp\u003E\u0022This technique seems to be completely in line with what people might one day do in fabrication facilities,\u0022 de Heer said. \u0022We believe this is quite significant in allowing us to rationally and reproducibly grow graphene on silicon carbide. We feel we now understand the process, and believe it could be scaled up for electronics manufacturing.\u0022\n\u003C\/p\u003E\n\u003Cp\u003EThe technique for growing large-area layers of epitaxial graphene was described this week in the Early Edition of the journal \u003Cem\u003EProceedings of the National Academy of Sciences\u003C\/em\u003E.  The research has been supported by the National Science Foundation through the Georgia Tech Materials Research Science and Engineering Center (MRSEC), the Air Force Office of Scientific Research, and the W.M. Keck Foundation.\n\u003C\/p\u003E\n\u003Cp\u003EThe paper also describes a technique for growing narrow graphene ribbons, a process de Heer\u0027s group has called \u0022templated growth.\u0022  That technique, which could be useful for making graphene interconnects, was first described in October 2010 in the journal \u003Cem\u003ENature Nanotechnology\u003C\/em\u003E.\n\u003C\/p\u003E\n\u003Cp\u003EThe templated growth technique involves etching patterns into silicon carbide surfaces using conventional nanolithography processes.  The patterns serve as templates directing the growth of graphene structures on portions of the patterned surfaces.  The technique forms nanoribbons of specific widths without the use of electron beams or other destructive cutting techniques.  Graphene nanoribbons produced with these templates have smooth edges that avoid problems with electron scattering.\n\u003C\/p\u003E\n\u003Cp\u003ETogether, the two techniques provide researchers with the flexibility to produce graphene in forms appropriate to different needs, de Heer noted.  Large-area sheets of graphene may be grown on both the carbon-terminated and silicon-terminated sides of a silicon carbide wafer, while the narrow ribbons may be grown on the silicon-terminated side.  Because of different processing techniques, only one side of a particular wafer can be used.  \n\u003C\/p\u003E\n\u003Cp\u003EThe Georgia Tech research team -- which includes Claire Berger, Ming Ruan, Mike Sprinkle, Xuebin Li, Yike Hu, Baiqian Zhang, John Hankinson and Edward Conrad -- has so far fabricated structures as narrow as 10 nanometers using the templated growth technique.  These nanowires exhibit interesting quantum transport properties.\n\u003C\/p\u003E\n\u003Cp\u003E\u0022We can make very good quantum wires using the templated growth technique,\u0022 de Heer said. \u0022We can make large structures and devices that demonstrate the Quantum Hall Effect, which is important for many applications.  We have demonstrated that templated growth can go all the way down to the nanoscale, and that the properties get even better there.\u0022\n\u003C\/p\u003E\n\u003Cp\u003EDevelopment of the sublimation technique arose from efforts to protect the growing graphene from oxygen and other contaminants in the furnace.  To address the quality concerns, the research team tried enclosing the wafer in a graphite container from which some silicon gas was permitted to leak out.\n\u003C\/p\u003E\n\u003Cp\u003E\u0022We soon realized that graphene grown in the container was much better than what we had been producing,\u0022 de Heer recalled. \u0022Originally, we thought it was because we were protecting it from contaminants.  Later, we realized it was because we were controlling the evaporation of silicon.\u0022\n\u003C\/p\u003E\n\u003Cp\u003EEpitaxial graphene may be the basis for a new generation of high-performance devices that will take advantage of the material\u0027s unique properties in applications where higher costs can be justified.  Silicon, today\u0027s electronic material of choice, will continue to be used in applications where high-performance is not required, de Heer said.\n\u003C\/p\u003E\n\u003Cp\u003EThough researchers are still struggling to design nanometer-scale epitaxial graphene devices that take advantage of the material\u0027s unique properties, de Heer is confident that will ultimately be done.\n\u003C\/p\u003E\n\u003Cp\u003E\u0022These techniques allow us to make accurate nanostructures and seem to be very promising for making the nanoscale devices that we need,\u0022 he said. \u0022While there are serious challenges ahead for using graphene in electronics, we have overcome roadblocks before.\u0022\n\u003C\/p\u003E\n\u003Cp\u003E\u003Cstrong\u003EResearch News \u0026amp; Publications Office\u003Cbr \/\u003E\nGeorgia Institute of Technology\u003Cbr \/\u003E\n75 Fifth Street, N.W., Suite 314\u003Cbr \/\u003E\nAtlanta, Georgia  30308  USA\n\u003C\/strong\u003E\u003C\/p\u003E\u003Cp\u003E\u003Cstrong\u003E\n\u003C\/strong\u003E\u003C\/p\u003E\u003Cp\u003E\u003Cstrong\u003EMedia Relations Contacts\u003C\/strong\u003E: John Toon (404-894-6986)(\u003Ca href=\u0022mailto:jtoon@gatech.edu\u0022\u003Ejtoon@gatech.edu\u003C\/a\u003E) or Abby Robinson (404-385-3364)(\u003Ca href=\u0022mailto:abby@innovate.gatech.edu\u0022\u003Eabby@innovate.gatech.edu\u003C\/a\u003E).\n\u003C\/p\u003E\n\u003Cp\u003E\u003Cstrong\u003EWriter\u003C\/strong\u003E: John Toon\n\u003C\/p\u003E\n\u003Cp\u003E\u0026nbsp;\u003C\/p\u003E","summary":null,"format":"limited_html"}],"field_subtitle":"","field_summary":[{"value":"\u003Cp\u003EGeorgia Tech scientists have for the first time provided details of their \u0022confinement controlled sublimation\u0022 technique for growing high-quality layers of epitaxial graphene on silicon carbide wafers.\u003C\/p\u003E","format":"limited_html"}],"field_summary_sentence":[{"value":"Scientists reveal details of their graphene fabrication process."}],"uid":"27303","created_gmt":"2011-09-22 00:00:00","changed_gmt":"2016-10-08 03:10:14","author":"John Toon","boilerplate_text":"","field_publication":"","field_article_url":"","dateline":{"date":"2011-09-22T00:00:00-04:00","iso_date":"2011-09-22T00:00:00-04:00","tz":"America\/New_York"},"extras":[],"hg_media":{"70183":{"id":"70183","type":"image","title":"Researchers with graphene furnace","body":null,"created":"1449177304","gmt_created":"2015-12-03 21:15:04","changed":"1475894616","gmt_changed":"2016-10-08 02:43:36"},"70184":{"id":"70184","type":"image","title":"Graphene furnace","body":null,"created":"1449177304","gmt_created":"2015-12-03 21:15:04","changed":"1475894616","gmt_changed":"2016-10-08 02:43:36"}},"media_ids":["70183","70184"],"related_links":[{"url":"http:\/\/www.physics.gatech.edu\/","title":"Georgia Tech School of Physics"},{"url":"http:\/\/www.mrsec.gatech.edu\/","title":"Materials Research Science and Engineering Center"},{"url":"http:\/\/www.graphene.gatech.edu\/","title":"Epitaxial Graphene Lab"},{"url":"https:\/\/www.physics.gatech.edu\/user\/walter-de-heer","title":"Walt de Heer"}],"groups":[{"id":"1188","name":"Research Horizons"}],"categories":[{"id":"145","name":"Engineering"},{"id":"149","name":"Nanotechnology and Nanoscience"},{"id":"135","name":"Research"},{"id":"150","name":"Physics and Physical Sciences"}],"keywords":[{"id":"10880","name":"epitaxial"},{"id":"14402","name":"furnace"},{"id":"429","name":"graphene"},{"id":"960","name":"physics"},{"id":"169534","name":"silicon carbide"},{"id":"12422","name":"Walt de Heer"}],"core_research_areas":[],"news_room_topics":[],"event_categories":[],"invited_audience":[],"affiliations":[],"classification":[],"areas_of_expertise":[],"news_and_recent_appearances":[],"phone":[],"contact":[{"value":"\u003Cp\u003E\u003Cstrong\u003EJohn Toon\u003C\/strong\u003E\u003Cbr \/\u003EResearch News \u0026amp; Publications Office\u003Cbr \/\u003E\u003Ca href=\u0022http:\/\/www.gatech.edu\/contact\/index.html?id=jt7\u0022\u003EContact John Toon\u003C\/a\u003E\u003Cbr \/\u003E\u003Cstrong\u003E404-894-6986\u003C\/strong\u003E\u003C\/p\u003E","format":"limited_html"}],"email":["jtoon@gatech.edu"],"slides":[],"orientation":[],"userdata":""}}}